- 1---------------------------------------------------------------------------------
- 2| Instruction Code | Language | Meaning |
- 3|-----------------------|-----------------------|-------------------------------|
- 4| 1000 | rarb | Add | RA, RB | Add |
- 5| 1001 | rarb | SHR | RA, RB | Shift Right |
- 6| 1010 | rarb | SHL | RA, RB | Shift Left |
- 7| 1011 | rarb | NOT | RA, RB | Not / Invert |
- 8| 1100 | rarb | AND | RA, RB | And |
- 9| 1101 | rarb | OR | RA, RB | Or |
- 10| 1110 | rarb | XOR | RA, RB | Exclusive Or |
- 11| 1111 | rarb | CMP | RA, RB | Compare |
- 12| 0000 | rarb | LD | RA, RB | Load RB from RAM addr in RA |
- 13| 0001 | rarb | ST | RA, RB | Store RB to RAM addr on RA |
- 14| 0010 | 00rb xxxxxxxx | DATA | RB, Data | Load the next 8 bits into RB |
- 15| 0011 | 00rb | JMPR | RB | Jump to address in RB |
- 16| 0100 | 0000 xxxxxxxx | JMP | Addr | Jump to address in next byte |
- 17| 0101 | CAEZ xxxxxxxx | JCAEZ | Addr | Jump if tested Flag is on |
- 18| 0110 | 0000 | CLF | | Clear all Flags |
- 19| 0111 | 00rb | IN | Data, RB | Input I/O Data to RB |
- 20| 0111 | 01rb | IN | Addr, RB | Input I/O Address to RB |
- 21| 0111 | 10rb | OUT | Data, RB | Output RB to I/O as Data |
- 22| 0111 | 11rb | OUT | Addr, RB | Output RB to I/O as Address |
- 23---------------------------------------------------------------------------------
- 24
- 25
- 261xxxyyzz
- 27| | | |
- 28| | | ----- Register B
- 29| | | 00 - Register 0
- 30| | | 01 - Register 1
- 31| | | 10 - Register 2
- 32| | | 11 - Register 3
- 33| | ------- Register A
- 34| | 00 - Register 0
- 35| | 01 - Register 1
- 36| | 10 - Register 2
- 37| | 11 - Register 3
- 38| ---------- Operation
- 39| 000 - Add - 0x8-
- 40| 001 - SHR - 0x9-
- 41| 010 - SHL - 0xA-
- 42| 011 - NOT - 0xB-
- 43| 100 - AND - 0xC-
- 44| 101 - OR - 0xD-
- 45| 110 - XOR - 0xE-
- 46| 111 - CMP - 0xF-
- 47------------ ALU Instruction
- 48
- 49000xyyzz
- 50 | | | |
- 51 | | | ----- Register B
- 52 | | | 00 - Register 0
- 53 | | | 01 - Register 1
- 54 | | | 10 - Register 2
- 55 | | | 11 - Register 3
- 56 | | ------- Register A
- 57 | | 00 - Register 0
- 58 | | 01 - Register 1
- 59 | | 10 - Register 2
- 60 | | 11 - Register 3
- 61 | --------- 0 = Load / 1 = Store
- 62 | Load - 0x0-
- 63 | Store - 0x1-
- 64 ----------- Load/Store instruction
- 65
- 660010xxzz dddddddd
- 67 | | | |
- 68 | | | - Any data you want
- 69 | | |
- 70 | | ---- Register B
- 71 | | 00 - Register 0
- 72 | | 01 - Register 1
- 73 | | 10 - Register 2
- 74 | | 11 - Register 4
- 75 | ------ Unused bits
- 76 |
- 77 --------- Data Instruction
- 78 Data - 0x2- 0xXX
- 79
- 800011xxzz
- 81 | | |
- 82 | | ----- Register B
- 83 | | 00 - Register 0
- 84 | | 01 - Register 1
- 85 | | 10 - Register 2
- 86 | | 11 - Register 3
- 87 | ------- Unused bits
- 88 |
- 89 ---------- Jump Register Instruction
- 90 JMPR - 0x3-
- 91
- 920100xxxx dddddddd
- 93 | | |
- 94 | | - Any address you want
- 95 | |
- 96 | ------ Unused bits
- 97 |
- 98 --------- Jump Instruction
- 99 Jump - 0x40 0xXX
- 100
- 1010101caez dddddddd
- 102 | |||| |
- 103 | |||| - Any address you want
- 104 | |||---- Zero Flag
- 105 | ||----- Equal Flag
- 106 | |------ A Larger Flag
- 107 | ------- Carry Flag
- 108 --------- Jump If Instruction
- 109 JC - 0x58 0xXX
- 110 JE - 0x54 0xXX
- 111 JA - 0x52 0xXX
- 112 JZ - 0x50 0xXX
- 113
- 1140110xxxx
- 115 | |
- 116 | ----- Unused bits usually set to 0000
- 117 --------- Clear Flags Instruction
- 118 CLF - 0x60
- 119
- 1200111xyzz
- 121 | || |
- 122 | || ---- Register B
- 123 | || 00 - Register 0
- 124 | || 01 - Register 1
- 125 | || 10 - Register 2
- 126 | || 11 - Register 3
- 127 | |------ Data=0/Address=1
- 128 | ------- Input=0/Output=1
- 129 --------- I/O Instruction
- 130 InData - 0x70 | Register B
- 131 InAddr - 0x74 | Register B
- 132 OutData - 0x78 | Register B
- 133 OutAddr - 0x7C | Register B
Raw Paste